xml - emacs nXML-mode hide subheadings error: Not in section -

xml - emacs nXML-mode hide subheadings error: Not in section -

emacs nxml-mode keeps saying "byte-code: not in section" error message when seek run nxml-hide-subheadings, i'm not sure why.

the formatting fine, when run validation command, tells me "no more errors".

i updated both nxml-section-element-name-regexp , nxml-heading-element-name-regexp include tags supposed heading in file, doesn't seems alter anything.

rng-what-schema command gives "vacuous schema".

nxml-forward/backward-elements runs fine.

as suggested, here xml file using:

<?xml version="1.0" encoding="utf-8"?> <!-- product version: vivado v2014.3 (64-bit) --> <!-- --> <!-- copyright 1986-2014 xilinx, inc. rights reserved. --> <project version="7" minor="2" path="/home/caiz/dev/pdd/pdd.xpr"> <defaultlaunch dir="$prundir"/> <configuration> <option name="id" val="cdf7cd0b34644b3fad8429729cc39541"/> <option name="part" val="xc7k70tfbg676-1"/> <option name="compiledlibdir" val="$pcachedir/compile_simlib"/> <option name="targetlanguage" val="vhdl"/> <option name="simulatorlanguage" val="vhdl"/> <option name="boardpart" val=""/> <option name="activesimset" val="data_selector_sim"/> <option name="defaultlib" val="xil_defaultlib"/> </configuration> <filesets version="1" minor="31"> <fileset name="tx_buffer_sim" type="simulationsrcs"> <filter type="srcs"/> <file path="$pprdir/src/tx_buffer_ram.vhd"> <fileinfo> <attr name="importpath" val="$pprdir/src/tx_buffer_ram.vhd"/> <attr name="importtime" val="1412826762"/> <attr name="usedin" val="synthesis"/> <attr name="usedin" val="simulation"/> </fileinfo> </file> <file path="$pprdir/src/tx_buffer_ram_tb.vhd"> <fileinfo> <attr name="importpath" val="$pprdir/src/tx_buffer_ram_tb.vhd"/> <attr name="importtime" val="1412826762"/> <attr name="usedin" val="synthesis"/> <attr name="usedin" val="simulation"/> </fileinfo> </file> <config> <option name="designmode" val="rtl"/> <option name="topmodule" val="tx_buffer_ram_tb"/> <option name="toplib" val="xil_defaultlib"/> <option name="simmode" val="post-implementation"/> <option name="srcset" val=""/> <option name="xsimwcfgfile" val="$pprdir/src/waveform/tx_buffer_ram_tb_behav.wcfg"/> </config> </fileset> </filesets> <simulators> <simulator name="xsim"> <option name="description" val="vivado simulator"/> </simulator> <simulator name="modelsim"> <option name="description" val="questasim/modelsim simulator"/> </simulator> <simulator name="ies"> <option name="description" val="incisive enterprise simulator (ies)"/> </simulator> <simulator name="vcs"> <option name="description" val="verilog compiler simulator (vcs)"/> </simulator> </simulators> <runs version="1" minor="9"> <run id="synth_1" type="ft3:synth" srcset="sources_1" part="xc7k70tfbg676-1" constrsset="constrs_1" description="vivado synthesis defaults" state="current" dir="$prundir/synth_1"> <strategy version="1" minor="2"> <strathandle name="vivado synthesis defaults" flow="vivado synthesis 2014"/> <step id="synth_design"/> </strategy> <generatedrun dir="$prundir" file="gen_run.xml"/> </run> <run id="impl_1" type="ft2:entiredesign" part="xc7k70tfbg676-1" constrsset="constrs_1" description="vivado implementation defaults" state="current" synthrun="synth_1"> <strategy version="1" minor="2"> <strathandle name="vivado implementation defaults" flow="vivado implementation 2014"/> <step id="init_design"/> <step id="opt_design"/> <step id="power_opt_design"/> <step id="place_design"/> <step id="post_place_power_opt_design"/> <step id="phys_opt_design"/> <step id="route_design"/> <step id="post_route_phys_opt_design"/> <step id="write_bitstream"/> </strategy> </run> </runs> </project>

and here related emacs settings have, stripped downwards bare minimum:

(custom-set-variables ;; custom-set-variables added custom. ;; if edit hand, mess up, careful. ;; init file should contain 1 such instance. ;; if there more one, won't work right. '(nxml-heading-element-name-regexp "title\\|head\\|project\\|configuration\\|filesets\\|fileset\\|simulators\\|runs\\|run") '(nxml-section-element-name-regexp "article\\|\\(sub\\)*section\\|chapter\\|div\\|appendix\\|part\\|preface\\|reference\\|simplesect\\|bibliography\\|bibliodiv\\|glossary\\|glossdiv\\|project\\|configuration\\|filesets\\|fileset\\|simulators\\|runs\\|run"))

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