shell - How to run regression using makefile -
i have tcsh shell. want compile 1 time vcs
, run multiple testcases using simv
. before single test vcs = vcs -sverilog -timescale=1ns/1ps \ +acc +vpi ..
, simv = ./simv +uvm_verbosity=$(uvm_verbosity) +uvm_testname=$(testname) ${vcs_waves_cmd} -l $(testname).log
defined constants.
i have replace $(testname) looping on array.i tried below switching bash causing other failures such make clean
not working.
tests = ext_reg_write_read reg_write_read regress: $(tests) $(vcs)\ t in $(tests); do\ ./simv +uvm_verbosity=$(uvm_verbosity) +uvm_testname=$$t ${vcs_waves_cmd} -l $$t.log;\ done
also add together export shell command export shell = /bin/csh -f
my question similar next – implementing `make check` or `make test`
i have used @j. c. salomon 's reply create code
the problem export shell = /bin/csh -f
changing export shell = /bin/bash -f
.
but shell := /bin/bash
works answered in how can utilize bash syntax in makefile targets? @derobert
shell makefile make tcsh
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