debugging - How to debug Cyclone II FPGA board in Quartus II -

debugging - How to debug Cyclone II FPGA board in Quartus II -

i'm writing programme in verilog , have variables see values of programme running on cyclone ii board, can't figure out console (if there one...). there way this? i've read $display function can't figure out output in quartus ii. unfortunately, can't seem find much info on this. help!

verilog has 2 main uses:

it's hdl (hardware description language) used describe synthesizable logic. part utilize create fpga or asic. it's scripting language used test , validate hardware designs through simulation.

for reason online tutorials find not emphasize distinction. start part 2 (which includes things $display) because newcomers trying things in simulator. constructs used scripting have no effect when code goes through synthesis used in fpga. there slight overlap, not work how might expect. if write for loop in simulator loop other programming language. if set synthesizable code within loop replicated loop (creating whole bunch of parallel fpga paths, 1 every pass through loop). scripting parts impact synthesis can thought of more metaprogramming.

you implement (or find existing implementation, called "ip" in hdl land) uart , print out info yourself, complex , costly (in terms of fpga area) exercise in fpga. typically debug fpga bring out debug pins , @ them oscilloscope or logic analyzer (even inexpensive 1 saleae logic). extremely inexpensive in terms of fpga resources. possibility log debug info inside fpga in block ram , read out later. both altera (with signaltap) , xilinx (with chipscope) provide both fpga code , gui drive via jtag port. quartus ii should give free license signaltap long agreed share anonymous statistics them. lastly knew, chipscope not free, , why hobby projects utilize altera fpgas.

debugging verilog quartus-ii