Monday 15 February 2010

Delete lines in a file, after pattern is found in perl -



Delete lines in a file, after pattern is found in perl -

the illustration input tcl file content:

# bind ::d::autobindmap $intfcname -------------so many other lines------------------------------ ############ powerfulness info vss ##################### #---------------------------- #pg_vss s100 #---------------------------- #add pg_vss_dl interface set intfcname pg_vss 1.0 s 100 #add verilog port binding vss ::d::autobindmap $module pg_vss $intfcname { vssgnd vss_dl; } ############ powerfulness info vdd ##################### #---------------------------- #pg_vdd s100 #---------------------------- #add pg_vdd_dl interface set intfcname pg_vdd 1.0 s 100 #add verilog port binding vss ::d::autobindmap $module pg_vdd $intfcname { vdd vss_dl; } -----------------------so many other lines------------------------------- #write component ::d::writelib $module

purpose: have array (which generated other part of code not presented here) consisting of strings. array content changing different files. if of array elements found in particular line of file using pattern matching need remove 11 lines after , line file.

problem: alter should made in current file itself. so, tried opening file in read-write mode. but, seeing garbage beingness printed.

for illustration (see input tcl file above):

i need remove lines (in case 11) till "}" after "power info $rpow " (for illustration $rpow vss) found, line beingness removed vss element of remove_power_list array. removal should happen array elements.

please if can solve issue?

only problematic code beingness presented here:

#####used help of stackoverflow fellow member praveen come code $rpow; $rpow (@remove_power_list) { $bf_content; open $bf_content, '+<', $bf_bind; $count = 0; while (<$bf_content>){ if($_ =~ /power\s+information\s+for\s+$rpow\s+/) { $count = $. + 11; } else { if($count != 0 && $. < $count) { } elsif($count != 0 && $. == $count) { $count =0; } else { print $bf_content $_; } } } close $bf_content; }

note: cannot install cpan file::slurp.

expected illustration output:

# bind ::d::autobindmap $intfcname -------------so many other lines------------------------------ ############ powerfulness info vdd ##################### #---------------------------- #pg_vdd s100 #---------------------------- #add pg_vdd_dl interface set intfcname pg_vdd 1.0 s 100 #add verilog port binding vss ::d::autobindmap $module pg_vdd $intfcname { vdd vss_dl; } -----------------------so many other lines-------------------------------

@aa_electronics: believe there lot of problems in script . per requirement have written perl code. have look:

inputfile: (input.txt)

# bind ::d::autobindmap $intfcname ############ powerfulness info vss ##################### #---------------------------- #pg_vss s100 #---------------------------- #add pg_vss_dl interface set intfcname pg_vss 1.0 s 100 #add verilog port binding vss ::d::autobindmap $module pg_vss $intfcname { vssgnd vss_dl; } ############ powerfulness info vdd ##################### #---------------------------- #pg_vdd s100 #---------------------------- #add pg_vdd_dl interface set intfcname pg_vdd 1.0 s 100 #add verilog port binding vss ::d::autobindmap $module pg_vdd $intfcname { vdd vss_dl; } #write component ::d::writelib $module

code:

use strict; utilize warnings; $infile = $argv[0]; $outfile = "out.txt"; open $fh,'<',$infile or die "couldnt open file $infile:$!" ; open $out,'>',$outfile or die "cannot write file $!"; $count = 0; $var = 0; @final=(); @remove_power_list = ("vcchg","vccl","vss"); while(<$fh>) { #chomp; foreach $rem(@remove_power_list) { $var++; $line = 'power\s+information\s+for\s+' . "$rem"; if($_ =~ /$line/g) { $count = $. + 11; } else { if($count != 0 && $. < $count) { } elsif($count != 0 && $. == $count) { $count =0; } else { if($var ==1) { push(@final,$_); } } } } $var=0; } foreach $rem(@remove_power_list) { foreach $res (@final) { $line = 'power\s+information\s+for\s+' . "$rem"; if($res =~ /$line/g) { $res =~ s/$res//isg; } } } foreach $finalval (@final) { print $out $finalval; } close($fh); close($out);

output: (out.txt)

# bind ::d::autobindmap $intfcname ############ powerfulness info vss ##################### ############ powerfulness info vdd ##################### #---------------------------- #pg_vdd s100 #---------------------------- #add pg_vdd_dl interface set intfcname pg_vdd 1.0 s 100 #add verilog port binding vss ::d::autobindmap $module pg_vdd $intfcname { vdd vss_dl; } #write component ::d::writelib $module

perl file-io

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