c - Why does arm-linux-gcc only reserve r0-r4 when entering IRQ mode -

c - Why does arm-linux-gcc only reserve r0-r4 when entering IRQ mode -

i'm using s5pv210 based on arm cortex-a8

when declare interrupt routine this:

void isr_routine(void) __attribute__ ((interrupt ("irq")));

and compile this

arm-linux-gcc -c -march=armv7-a -fpie -fno-builtin $< -o $@

i know gcc switch context me force registers.before know this, did manually.so i'm curious how gcc it. after disassembling, found codes below

push {r0-r4,r11,r12,lr}

it goes against conception how switch context. in arm cortex-a8 official document, it's explicit r0-r12 shared user mode , irq mode.however lr in user mode independent irq mode.so, used switch context this

push {r0-r12}

is ok? why gcc force lr register , why doesn't gcc force r5-r10 rigsters?

r4-r11 preserved across function calls part of arm abi, interrupt routine not need save them unless the function itself going clobber them. if function interrupt routine calls wants modify these registers, it's obligated save , restore them part of normal abi. seems among set, compiler wanted utilize r4 , r11 (r5-r10 not used).

while non-authoritative, wikipedia article easy read , may helpful: http://en.wikipedia.org/wiki/calling_convention#arm

c gcc assembly arm cortex-a8