Friday 15 May 2015

c - When do I need to use volatile in ISRs? -



c - When do I need to use volatile in ISRs? -

i making embedded firmware after initialization happens in isrs. have variables shared between them, , wondering in cases need volatile. never block, waiting alter in isr.

when can actual memory read or written when not using volatile? 1 time every isr?

addendum: arm cortex-m0, isn't question isrs much compiler optimization, , such, platform shouldn't important.

the question exclusively answerable, , reply simple:

without volatile (simplistically) can't assume actual memory access ever happen - compiler free conclude results either exclusively unused (if apparent in can see), or may safely cached in register, or computed out of order (as long visible dependencies maintained).

you need volatile tell compiler side effects of access may of import optimizer unable analyze, such interrupt context or context of different "thread".

in effect volatile how compiler "i know don't, don't seek clever here"

beware volatile does not guarantee atomicity of read-modify-write, or of read or write lone info type (or misalignment) requires muti-step access. in cases, risk not getting stale value, exclusively erroneous one.

c volatile interrupt-handling

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